1. Field of the Invention
The present invention relates a liquid crystal display device, and in particular, to an in-plane switching mode liquid crystal display device with improved aperture ratio.
2. Discussion of the Related Art
Recently, with the development of various portable electronic equipment such as mobile phones, PDA's and a notebook computers, demands for flat panel display devices having light weight, small size and adaptability have correspondingly increased. LCD (liquid crystal displays), PDPs (plasma display panel, FED (field emission displays). VFD (vacuum fluorescent displays), etc. have been actively researched as the flat panel display devices. Among these the LCD presently the focus in the mass production.
The LCD has various display modes according to alignment of liquid crystal molecules. Among them, a TN (Twisted Nemamic) mode is mainly used at present because of white-black display easiness, fast response time and low driving voltages. In the TN mode liquid crystal display device, when voltage is applied to liquid crystal molecules aligned at a surface of a substrate, the liquid crystal molecules are aligned at right angles to the substrate. Accordingly, when a voltage is applied, a viewing angle is reduced by refractive anisotropy of the liquid crystal molecules.
In order to solve the above-mentioned viewing angle problem, various liquid crystal display devices having wide viewing angle characteristics have been presented. Among them, an in-plane switching mode liquid crystal display device has been mass-produced. In the IPS mode liquid crystal display device, when a voltage is applied, viewing angle characteristics can be improved by aligning liquid crystal molecules on a plane by forming a horizontal electric field parallel to the plane of a substrate. FIGS. 1A and 1B show a basic concept thereof.
As depicted in FIG. 1A, in an IPS mode liquid crystal display panel 1, a common electrode 5 and a pixel electrode 7 are arranged parallel to a pixel. When a voltage is not applied to the pixel electrode 7 (there is no signal input), liquid crystal molecules 3 are arranged parallel to the common electrode 5 and the pixel electrode 7. In more detail, the liquid crystal molecules 3 are aligned at a certain angle to an extended direction of the common electrode 5 and the pixel electrode 7. When the liquid crystal molecules 3 are aligned completely parallel with the common electrode 5 and the pixel electrode 7, rotational direction of the liquid crystal molecules is not definite, and when a gray level signal is applied to the pixel electrode 7, aligning of the liquid crystal molecules is irregular along a whole liquid crystal layer. Accordingly, the actual liquid crystal molecules 3 have to be aligned at a specific angle with respect to the common electrode 5 and the pixel electrode 7. However, in the drawings, the liquid crystal molecules 3 are aligned parallel to the common electrode 5 and the pixel electrode 7 for convenience.
As depicted in FIG. 1B, when a voltage (signal) is applied to the pixel electrode 7 of the liquid crystal display panel 1 in which the liquid crystal molecules 3 are aligned parallel with the common electrode 5 and the pixel electrode 7, a horizontal electric field 9 parallel to the liquid crystal display panel 1 occurs between the common electrode 5 and the pixel electrode 7, and the liquid crystal molecules 3 are rotated according to the horizontal electric field. When a voltage is applied, the liquid crystal molecules 3 are rotated in the same plane accordingly to the horizontal electric field 9, and accordingly gray inversion due to refractive anisotropy can be prevented.
FIGS. 2A and 2B show structures of an IPS mode liquid crystal display panel, FIG. 2A shows a structure of one pixel in the liquid crystal display panel, and FIG. 2B is a sectional view taken along line I-I′ in FIG. 2A.
As depicted in FIG. 2A, a pixel of the liquid crystal display panel 1 is defined by a data line 10 and a gate line 20. Only one pixel is shown in FIG. 2A. However, in the actual liquid crystal display panel 1, there are ‘n’ data lines 10 and ‘m’ gate lines 20, and the n×m-pixels are formed on the whole liquid crystal display panel 1. A thin film transistor 11 is formed at a cross region of the data line 10 and the gate line 20 in the pixel. The thin film transistor 11 includes a gate electrode 18 for receiving a scanning signal from the gate line 20, a semiconductor layer 16 formed on the gate electrode 18 and forming a channel layer by being activated according to the applied scanning signal, a drain electrode 12 formed on the semiconductor layer 16 and receiving a picture signal through the data line 10, and a source electrode 14. Accordingly, the thin film transistor 11 applies the picture signal received from the outside to a liquid crystal layer 50.
In the pixel, a first through third common electrodes 5a-5c arranged parallel to the data line as well as first and second pixel electrodes 7a, 7b. In addition, a common line 22 contacted to the first through third common electrodes 5a-5c, and a pixel electrode line 24 contacted to the first and second pixel electrodes 7a, 7b are arranged at the center of the pixel.
The common electrodes 5a-5c and the pixel electrodes 7a, 7b are not formed at the same plane. As depicted in FIG. 2B, the common electrodes 5a-5c are formed on a lower substrate 30 made of a transparent glass, etc., and the pixel electrodes 7a, 7b are formed on a gate insulating layer 32. In the meantime, because the common electrodes 5a-5c and the pixel electrodes 7a, 8b are respectively contacted to the common line 22 and the pixel electrode line 24, the common line 22 and the pixel electrode line 24 are respectively formed on the lower substrate 30 and the gate insulating layer 32.
Not shown in drawings, the gate electrode 18 of the thin film transistor is formed on the substrate 30, and the insulating layer 16 is formed on the gate insulating layer 32. In addition, the source electrode 12 and the drain electrode 14 are formed on the semiconductor layer 16. The common electrodes 5a-5c and the pixel electrodes 7a, 7b formed in the pixel regions can be respectively formed by a process different from that of the thin film transistor, but are usually formed by the same process. The common electrodes 5a-5c are formed in a process of the gate electrode 18 of the thin film transistor, and the pixel electrodes 7a, 7b are formed in a process of the source electrode 12 and the drain electrode 14. Accordingly, a whole process can be performed quickly.
In the liquid crystal display panel 1, when a scanning signal is applied to the thin film transistor through the gate line 20, the thin film transistor is turned on, a picture signal is transmitted to the pixel electrodes 7a, 7b through the data line 10, a horizontal electric field parallel to the plane of the substrate occurs between the common electrodes 5a-5c and the pixel electrodes 7a, 7b. Accordingly the liquid crystal molecules are rotated according to the electric field direction.
In the meantime, when a picture signal is input to the pixel electrodes 7a, 7b, an electric field occurs not only between the common electrodes 5a-5c and the pixel electrodes 7a, 7b but also between the pixel electrodes 7a, 7b and the data lines 10a, 10b. However, because the electric field between the pixel electrodes 7a, 7b and the data lines 10a, 10b distorts the whole horizontal electric field, the liquid crystal molecules are not aligned parallel to the substrate. Accordingly, a directional cross talk occurs.
To solve the problem, the first common electrode 5a has to be arranged between the first pixel electrode 71 and the data line 10a, and the third common electrode 5c has to be arranged between the second pixel electrode 7b and the data line 10b to shield the electric field from the data lines 10a, 10b. To shield the electric field efficiently, the first common electrode 5a and the third common electrode 5c respectively abut the data lines 10a, 10b. Accordingly, a region between the first common electrode 5a and the data line 10a as well as and a region between the third common electrode 5c and the data line 10b are very small. As a result, the picture of the liquid crystal display device is not displayed in these regions.
On an upper substrate 40, a black matrix 42 and a color filter layer 44 are formed. The black matrix 42 prevents light from being leaked to the thin film transistor region and pixels. The color filter layer 44 implements an actual color to be formed. A liquid crystal layer 50 is formed between the lower substrate 30 and the upper substrate 40. Accordingly, an IPS mode liquid crystal display panel is completed. As shown, the black matrix 42 is extended to not only the data lines 10a, 10b but also the first common electrode 5a and the third common electrode 5c. Thus, light can be prevented from being leaked to regions between the common electrodes 5a, 5c and the data lines 10a, 10b. 
The IPS mode liquid crystal display device has a lower aperture ratio in comparison with that of a TN mode liquid crystal display device. In the TN mode liquid crystal display device, the pixel electrodes and the common electrodes for applying signals to the liquid crystal layer are made of ITO (indium tin oxide) as transparent metal. In contrast, in the IPS mode liquid crystal display device, the common electrodes 5a-5c and the pixel electrodes 7a, 7b are made of an opaque metal (gate metal or source metal). As a result, an aperture ratio is lowered as much as regions in which the common electrodes 5a-5c and the pixel electrodes 7a, 7b are formed. In particular, because the common electrodes 5a, 5c are formed abutting on the data lines 10a, 10b, the number of common electrodes arranged in one pixel is greater than the number of pixel electrodes. Therefore, an aperture ratio is reduced even more.